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Thursday, October 8, 2009
| 8:00 | Breakfast
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| 8:45-9:00 | Opening Remarks Lori Pollock Xiaoming Li
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| 9:00-10:00 | Keynote speech I: HPC in Phase Change: Towards a New Parallel Execution Model Thomas Sterling
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| 10:00-10:30 | Break
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| 10:30-12:00 | Languages and Programming Environment Support I
The STAPL pList Hardware Support for OpenMP Collective Operations
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| 12:00-13:00 | Lunch
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| 13:00-15:00 | GPU, Cell and Many-cores Loop Transformation Recipes for Code Generation and Auto-Tuning MIMD Interpretation On A GPU TL-DAE: Thread-Level Decoupled Access/Execution for OpenMP on the Cyclops-64 Many-core Processor Mapping Streaming Languages to General Purpose Processors through Vectorization
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| 15:00-15:30 | Break
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| 15:30-17:00 | Performance Tuning A Balanced Approach to Application Performance Tuning Automatically tuning parallel and parallelized programs DFT Performance Prediction in FFTW
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| 17:00-17:15 | Program Committee Report John Cavazos
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| 17:30-19:00 | Reception Panel: What do compiler optimizations mean for many-cores? Panelists: Albert Cohen (INRIA, France), Hironori Kasahara (Waseda University, Japan), Rishi Khan (ETI), David Padua (University of Illinois at Urbana-Champaign), and Nicolas Vasilache (Reservoir Inc.) Moderator: Xiaoming Li |
Friday, October 9, 2009
| 8:00 | Breakfast
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| 9:00-10:00 | Keynote Speech II: The Polytope Model, Past, Present, Future Paul Feautrier
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| 10:00-10:30 | Break
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| 10:30-12:00 | Languages and Programming Environment Support II Safe and Familiar Multi-core Programming by means of a Hybrid Functional and Imperative Language Hierarchical Place Trees: A Portable Abstraction OSCAR API for Real-time Low-Power Multicores and Its Performance on Multicores and SMP Servers
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| 12:00-13:00 | Lunch on your own
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| 13:00-15:00 | Parallel Compiler Technology Programming with Intervals Adaptive and Speculative Memory Consistency Support for Multi-Core Architectures with On-Chip Local Memories Synchronization-Free Automatic Parallelization: Beyond Affine Iteration-Space Slicing Automatic Data Distribution for Improving Data Locality on the Cell BE Architecture
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| 15:00-15:30 | Break
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| 15:30-17:30 | General Compiler Technology Automatic Restructuring of Linked Data Structures Using The Meeting Graph Framework to Minimise Kernel Loop Unrolling for Scheduled Loops Efficient Tiled Loop Generation: D-tiling Effective Source-to-Source Outlining to Support Whole Program Empirical Optimization
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| 17:45 | Bus leaves for workshop dinner |
| 18:00-21:00 | Banquet at Bayard House Keynote Speech III: The Soul of A New Language: The Story of UPCBill Carlson |
Saturday, October 10, 2009
| 8:00 | Breakfast
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| 8:15-10:15 | Runtime and feedback-driven optimization Speculative Optimizations for Parallel Programs on Multicores Fastpath Speculative Parallelization PSnAP: Accurate Synthetic Address Streams Through Memory Profiles Enforcing Textual Alignment of Collectives Using Dynamic Checks
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| 10:15-10:45 | Break
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| 10:45-12:45 | Short Papers A Code Generation Approach for Auto-Vectorization in the SPADE Compiler Portable Just-in-time Specialization of Dynamically Typed Scripting Languages Reducing Training Time in a One-shot Machine Learning-based Compiler Optimizing Local Memory Allocation and Assignment Through a Decoupled Approach Unrolling loops containing task parallelism
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| 12:45-13:15 | Lunch for Tutorial Attentees
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| 13:15-13:30 | Change room for tutorial
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| 13:30-17:00 |